1. Field of the Invention
The invention relates to integrated circuit testing.
2. Background
In the assembly of component parts (devices) from various suppliers in a package, such as a motherboard of a processor, such parts are generally inventoried, subjected to a quality assurance analysis for fitness, staged in readiness, and assembled into the package. The package is then tested for fitness, both through visual inspections and circuit testing. The visual inspection may involved, for example, a visual confirmation that the correct part is located in the correct place. The circuit testing generally device values (e.g., through current, resistance, capacitance, etc.) component orientation, and circuit content. It is appreciated that in the assembly of a package, it is desirous that the correct and capable part is installed in the package.
Many component parts of a scale of less than four microns (xcexcm) include an I2C bus and associated registers. The I2C bus was developed by Philips Semiconductor of Sunnyvale, California. The electrical fitness of a part (device) with an associated I2C bus and register may be evaluated through such circuitry.
Generally larger (about 4 xcexcm or greater) legacy technology necessary, for example, for handling high power conversion applications typically do not contain I2C bus technology and the increase pin count associated with such technology is not cost effective to incorporate. Accordingly, what is needed is an alternative for electrically verifying the fitness of a component part (device) that is compatible with larger scale components.